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mahendra sakare

  • PhD
  • Indian Institute of Technology Bombay
  • 2h-indexImpact measure calculated using publication and citation counts. Updated daily.
  • 13CitationsNumber of citations received by mahendra's publications. Updated daily.

Publications (5)

  • A Power and Area Efficient Architecture of a PRBS Generator with Multiple Outputs

    • Sakare M
    N/AReaders
    0Citations
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  • A 12.5 Gbps One-Fifth Rate CDR Incorporating a Novel Sampler Based Phase Detector and a DFE

    • Maheshwari P
    • Kaushik S
    • Sakare M
    • et al.
    N/AReaders
    0Citations
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  • A Quarter-Rate 27-1 Pseudo-Random Binary Sequence Generator Using Interleaved Architecture

    • Sakare M
    N/AReaders
    1Citations
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  • Bandwidth Enhancement of Flip-Flops Using Feedback for High-Speed Integrated Circuits

    • Sakare M
    • Pavan Kumar S
    • Gupta S
    N/AReaders
    2Citations
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  • A high-speed PRBS generator using flip-flops employing feedback for distributed equalization

    • Sakare M
    • Gupta S
    N/AReaders
    3Citations
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Education history

Indian Institute of Technology, Bombay