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Murali Jayapala

  • Sr. Researcher
  • Interuniversity Microelectronics Center (IMEC)
  • 53PublicationsNumber of items in Murali's My Publications folder on Mendeley.
  • 9Followers

Research interests

low power embedded systemshybrid bio-electronic systemsSystem design of biomedical systems

Groups

  • test
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Followers (9)

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Following (9)

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Publications (5)

  • Compilation Technique for Loop Overhead Removal

    • Kroupis N
    • Raghavan P
    • Jayapala M
    • et al.
    N/AReaders
    N/ACitations
  • Playing the trade-off game

    • Raghavan P
    • Jayapala M
    • Lambrechts A
    • et al.
    N/AReaders
    N/ACitations
    Get full text
  • Design Style Case Study for Compute Nodes of a Heterogenenous NoC Platform

    • Lambrecths A
    • Aa T
    • Jayapala M
    • et al.
    N/AReaders
    N/ACitations
  • Instruction and Data Memory Energy Trade-off using a High-level Model

    • Aa T
    • Jayapala M
    • Barat F
    • et al.
    N/AReaders
    N/ACitations
  • L0 Buffer Energy Optimization Through Scheduling and Exploration

    • Jayapala M
    • Aa T
    • Barat F
    • et al.
    N/AReaders
    N/ACitations

Professional experience

Sr. Researcher

Interuniversity Microelectronics Center (IMEC)

April 2005 - Present

Education

PhD

KU Leuven

February 2000 - September 2005(6 years)