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Seyed Nematollah Ahmadyan

  • Ph.D.
  • Research Engineer
  • Snap
  • 3h-indexImpact measure calculated using publication and citation counts. Updated daily.
  • 22CitationsNumber of citations received by Seyed Nematollah's publications. Updated daily.

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Co-authors (7)

  • Hossein Salimian
  • Alireza Ghasemi
  • Nima PD

Publications (5)

  • A novel test compression algorithm for analog circuits to decrease production costs

    • Ahmadyan S
    • Natarajan S
    • Vasudevan S
    N/AReaders
    0Citations
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  • Fast eye diagram analysis for high-speed CMOS circuits

    • Ahmadyan S
    • Gu C
    • Natarajan S
    • et al.
    N/AReaders
    2Citations
  • Efficient statistical model checking of hardware circuits with multiple failure regions

    • Kumar J
    • Ahmadyan S
    • Vasudevan S
    N/AReaders
    2Citations
    Get full text
  • Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithm

    • Ahmadyan S
    • Kumar J
    • Vasudevan S
    N/AReaders
    5Citations
  • Goal-oriented stimulus generation for analog circuits

    • Ahmadyan S
    • Kumar J
    • Vasudevan S
    N/AReaders
    9Citations
    Get full text

Professional experience

Research Engineer

Snap

January 2017 - Present