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Taesang Cho

  • Inha University
  • 2h-indexImpact measure calculated using publication and citation counts. Updated daily.
  • 83CitationsNumber of citations received by Taesang's publications. Updated daily.

About

Taesang Cho was born in Seoul, Korea, in 1984. He received the B.S. degree in electronics engineering from Hankuk University of Foreign Studies (HUFS), Yongin, Korea, in 2009, and the M.S. degree in information & communication engineering from Inha University, Incheon, Korea, in 2011, respectively. From August 2012 to September 2015, he was an Assistant Research Engineer at the I&C Technology, Seongnam, Korea, where he was responsible for development of several digital VLSI architectures for physical layer of wireless modem SoC, such as Wi-Fi, LTE, etc. Since August 2011, he is currently pursuing the Ph.D. degree in Inha University. His research interest includes design methodology of low-power digital circuits, digital VLSI circuits and FPGA implementation of DSP algorithms, such as high-speed fast Fourier transform (FFT) processor architectures for orthogonal frequency division multiplexing (OFDM) system, forward error correction (FEC) architectures for broadband communication systems, crypto-processor, etc.

Recent publications

  • A high-speed low-complexity modified Radix-2^5 FFT processor for high rate WPAN applications

    • Cho T
    • Lee H
    N/AReaders
    53Citations
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  • A high-speed low-complexity modified radix-2^5 FFT processor for gigabit WPAN applications

    • Cho T
    • Lee H
    • Park J
    • et al.
    N/AReaders
    30Citations
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Education

Ph.D. in Information and Communication Engineering (temporary absence from school)

Inha University

September 2011 - Present

M.S. in Information and Communication Engineering

Inha University

March 2009 - February 2011(2 years)

B.S. in Electronics Engineering

Hankuk University of Foreign Studies

March 2004 - February 2009(5 years)

Co-authors (7)

  • Jeongbae Jeon

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