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Wladek Grabinski

  • Ph.D.
  • 9h-indexImpact measure calculated using publication and citation counts. Updated daily.
  • 275CitationsNumber of citations received by Wladek's publications. Updated daily.

Research interests

Verilog-A standardizationcompact/spice modeling

About

http://ch.linkedin.com/in/wladekgrabinski

Co-authors (60)

Publications (5)

  • FOSS EKV 2.6 parameter extractor

    • Grabinski W
    • Tomaszewski D
    • Jazaeri F
    • et al.
    N/AReaders
    1Citations
    Get full text
  • Compact modeling of homojunction tunnel FETs

    • Biswas A
    • Dagtekin N
    • Alper C
    • et al.
    N/AReaders
    0Citations
    Get full text
  • Open-source circuit simulation tools for RF compact semiconductor device modelling

    • Grabinski W
    • Brinson M
    • Nenzi P
    • et al.
    N/AReaders
    3Citations
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  • Steep slope VO<inf>2</inf>switches for wide-band (DC-40 GHz) reconfigurable electronics

    • Vitale W
    • Paone A
    • Fernandez-Bolanos M
    • et al.
    N/AReaders
    12Citations
    Get full text
  • RF distortion analysis with compact MOSFET models

    • Bendix P
    • Rakers P
    • Wagh P
    • et al.
    N/AReaders
    46Citations

Professional experience

Senior R&D Eng.

Freescale, Geneva

July 2003 - December 2005(2 years)

R&D Eng.

Motorola, Geneva

June 2000 - June 2003(3 years)

R&D Assistant

ETHZ

June 1991 - December 1998(8 years)

R&D Director

GMC Reaserch

Education

Ph.D.

ITE

September 1984 - December 1991(7 years)

M.Sc.

Politechnika

September 1979 - June 1984(5 years)