Analysis of the behavior of a dynamic latch comparator

  • Cusinato P
  • Bruccoleri M
  • Caviglia D
 et al. 
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Abstract

This brief deals with the behavior of a dynamic latch used as a voltage comparator. A detailed analysis of the fine settling phase is reported, putting in evidence the non-idealities which lead to comparison errors. A technique to minimize such errors is suggested. An experimental chip has been fabricated and measurements are reported and discussed

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