FPGA based hardware accelerators have been more and more widely used in different kind of applications. As compared to other solutions and the direct hardware implementation, the advantage of the FPGA devices is their flexibility that arises from their programmable nature. In addition to this, some FPGA devices also support partial dynamic reconfiguration. When general purpose processors and reconfigurable computational structures are used together, the most advantageous properties of both components can be utilized. Algorithms (searching, sorting, signal and image processing, etc.) that are implemented such way have achieved 100 times or 1000 times better performance. This paper introduces a Xilinx Virtex-5 FPGA based reconfigurable hardware accelerator system, which has been created mainly for image processing purposes. By using the partial reconfiguration capability of the FPGA, the execution units in the system can be quickly reconfigured.
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