A DC-link voltage balancing algorithm for 3-level converter using the zero sequence current

  • Sun-Kyoung Lim
  • Jun-Ha Kim
  • Kwanghee Nam
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The voltage unbalance between the upper and lower capacitors is an
important problem in the three-level PWM converter system, and it is
known that the voltage unbalance is directly related to the zero
sequence. In this paper, we provide a zero sequence current path by
connecting the neutral point of the source transformer to the midpoint
of the DC link capacitors. Further, we control the unbalanced voltage
with the zero sequence current. The zero sequence current is controlled
by the zero sequence voltage made from sinusoidal PWM. The effectiveness
of the proposed scheme is verified by computer simulations and

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  • Sun-Kyoung Lim

  • Jun-Ha Kim

  • Kwanghee Nam

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