Directional deposition of Cu into semiconductor trench structures using ionized magnetron sputtering

Abstract

The primary metallization technique in the semiconductor industry for the past decade has been magnetron sputtering. The general industry trend towards damascene processing requires the capability to fill trenches and vias with sub-one-half micron widths and aspect ratios (AR) as high as 3:1. At these dimensions and geometries, the angular distribution of magnetron sputtered atoms results in the production of voids during deposition. A new approach to this problem is directional sputter deposition, where neutrals generated from magnetron sputtering are ionized through an inductively coupled rf plasma and accelerated towards the substrate via a small dc bias on the substrate, causing a significant portion of the flux to arrive at normal incidence. The experimental parameters of this process have been explored by depositing Cu on patterned Si wafers. The parameters have varying effects on the morphology of the deposited layer, which indicate relationships between the parameters and the ion-to-neutral ratio, the total flux, and the average ion energy. The ionized magnetron sputter deposition process has been used successfully to fill trenches of 600 nm width and 1.1 AR with Cu near room temperature, and appears to be extendable to more aggressive dimensions.