A Flexible Approach to Improving System Reliability with Virtual Lockstep

  • Jeffery C
  • Figueiredo R
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There is an increasing need for fault tolerance capabilities in logic devices brought about by the scaling of transistors to ever smaller geometries. This paper presents a hypervisor-based replication approach that can be applied to commodity hardware to allow for virtually lockstepped execution. It offers many of the benefits of hardware-based lockstep while being cheaper and easier to implement and more flexible in the configurations supported. A novel form of processor state fingerprinting is also presented, which can significantly reduce the fault detection latency. This further improves reliability by triggering rollback recovery before errors are recorded to a checkpoint. The mechanisms are validated using a full prototype and the benchmarks considered indicate an average performance overhead of approximately 14 percent with the possibility for significant optimization. Finally, a unique method of using virtual lockstep for fault injection testing is presented and used to show that significant detection latency reduction is achievable by comparing only a small amount of data across replicas.

Author-supplied keywords

  • Fault detection
  • Fingerprint recognition
  • Hardware
  • Prototypes
  • Reliability engineering
  • Virtualization
  • autonomic computing.
  • dependable architectures
  • detection latency reduction
  • electronic engineering computing
  • fault detection latency
  • fault diagnosis
  • fault injection
  • fault injection testing
  • fault tolerance
  • fault tolerance capabilities
  • hypervisor based replication approach
  • integrated circuit reliability
  • logic circuits
  • logic devices
  • optimisation
  • optimization
  • processor state fingerprinting
  • rollback recovery
  • software reliability
  • system reliability
  • transistors
  • transistors scaling
  • virtually lockstepped execution

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  • C. M. Jeffery

  • R. J. O. Figueiredo

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