A fully integrated EPC Gen-2 UHF-Band passive tag IC using an efficient power management technique

  • Lee J
  • Phan N
  • Vo D
 et al. 
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Abstract

We present a system-on-chip passive tag integrated circuit (IC) for secure near-field RF identification applications. The design of the RF transceiver and the digital control of the tag IC are based on the EPCglobal ultrahigh-frequency Gen-2 protocol. A new design technique for the power management of the tag IC is presented, which includes a low-voltage bandgap, a low-dropout regulator with a bias-boosted gain stage, and an adaptive dc limiter. With the proposed design technique, we achieve a high power conversion efficiency of 47% at a low input power of -12 dBm. To support data security, we use one-time programmable (OTP) memory for nonvolatile data storage. The 4-kb (256 × 16 b) OTP memory array is based on a two-transistor (2-T) gate-oxide antifuse that can be programmed with a voltage of less than 6 V. The tag chip was fabricated in a 1-poly 6-metal standard 0.13- μm CMOS process. The power consumption levels of the tag IC are 29.2 and 71.2 μW for the read and programming modes, respectively. The size of the tag chip is 1.1×1 mm2.

Author-supplied keywords

  • Passive RF identification (RFID)
  • system-on-chip
  • tag
  • ultrahigh frequency (UHF)

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Authors

  • Jong Wook Lee

  • Ngoc Dang Phan

  • Duong Huynh Thai Vo

  • Vinh Hao Duong

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