We present a system-on-chip passive tag integrated circuit (IC) for secure near-field RF identification applications. The design of the RF transceiver and the digital control of the tag IC are based on the EPCglobal ultrahigh-frequency Gen-2 protocol. A new design technique for the power management of the tag IC is presented, which includes a low-voltage bandgap, a low-dropout regulator with a bias-boosted gain stage, and an adaptive dc limiter. With the proposed design technique, we achieve a high power conversion efficiency of 47% at a low input power of $-$12 dBm. To support data security, we use one-time programmable (OTP) memory for nonvolatile data storage. The 4-kb (256 $\times$ 16 b) OTP memory array is based on a two-transistor (2-T) gate-oxide antifuse that can be programmed with a voltage of less than 6 V. The tag chip was fabricated in a 1-poly 6-metal standard 0.13- $\mu\hbox{m} $ CMOS process. The power consumption levels of the tag IC are 29.2 and 71.2 $\mu\hbox{W}$ for the read and programming modes, respectively. The size of the tag chip is $1.1\times 1\ \hbox{mm} 2. © 1982-2012 IEEE.
CITATION STYLE
Lee, J. W., Phan, N. D., Vo, D. H. T., & Duong, V. H. (2014). A fully integrated EPC Gen-2 UHF-Band passive tag IC using an efficient power management technique. IEEE Transactions on Industrial Electronics, 61(6), 2922–2932. https://doi.org/10.1109/TIE.2013.2278519
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