A Fully Integrated High-Performance FM Stereo Decoder

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Abstract

This paper describes a custom FM stereo decoder IC which uses switched-capacitor and linear filters, linear MOS and bipolar circuitry, and digital MOS circuitry to eliminate the requirements for accurate external components and external adjustments. The IC includes a combined analog/digital VCO and PLL, a switched-capacitor sine-wave multiplier, and a switched-capacitor pilot detector and cancellation stage. An output S/N ratio greater than 80 dB and output distortion less than 0.1% have been achieved. The part is 26 000 mils 2 and is implemented in a 3-μm n-well CMOS process containing poly-to-poly capacitors, n-p-n's, and ion-implanted poly resistors. © 1992 IEEE

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Manlove, G. J., Marrah, J. J., & Kennedy, R. A. (1992). A Fully Integrated High-Performance FM Stereo Decoder. IEEE Journal of Solid-State Circuits, 27(3), 343–350. https://doi.org/10.1109/4.121556

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