Impact of technology trends on SEU in CMOS SRAMs

  • Dodd P
  • Sexton F
  • Hash G
 et al. 
  • 18


    Mendeley users who have this article in their library.
  • N/A


    Citations of this article.


The impact of technology trends on the SEU hardness of epitaxial CMOS SRAMs is investigated using three-dimensional simulation. We study trends in SEU susceptibility with parameter variations across and within technology generations. Upset mechanisms for various strike locations and their dependence on gate-length scaling are explored. Such studies are useful for technology development and providing input for process and design decisions. An application of SEU simulation, to the development of a 0.5-μm radiation-hardened CMOS SRAM is presented

Get free article suggestions today

Mendeley saves you time finding and organizing research

Sign up here
Already have an account ?Sign in

Find this document


  • P E Dodd

  • F W Sexton

  • G L Hash

  • M R Shaneyfelt

  • B L Draper

  • A J Farino

Cite this document

Choose a citation style from the tabs below

Save time finding and organizing research with Mendeley

Sign up for free