A low-power compressive sampling time-based analog-to-digital converter

22Citations
Citations of this article
29Readers
Mendeley users who have this article in their library.
Get full text

Abstract

This paper presents a low-power, time-based, compressive sampling architecture for analog-to-digital conversion. A random pulse-position- modulation (PPM) analog-to-digital conversion (ADC) architecture is proposed. A prototype 9-bit random PPM ADC incorporating a pseudo-random sampling scheme is implemented as proof of concept. This approach leverages the energy efficiency of time-based processing. The use of sampling techniques that exploit signal compressibility leads to further improvements in efficiency. The random PPM (pulse-position-modulation) ADC employs compressive sampling techniques to efficiently sample at sub-Nyquist rates. The sub-sampled signal is recovered using a reconstruction algorithm, which is tailored for practical hardware implementation. We develop a theoretical analysis of the hardware architecture and the reconstruction algorithm. Measurements of a prototype random PPM ADC and simulation, demonstrate this theory. The prototype successfully demonstrates a 90% reduction in sampling rate compared to the Nyquist rate for input signals that are 3% sparse in frequency domain. © 2011 IEEE.

Cite

CITATION STYLE

APA

Yenduri, P. K., Rocca, A. Z., Rao, A. S., Naraghi, S., Flynn, M. P., & Gilbert, A. C. (2012). A low-power compressive sampling time-based analog-to-digital converter. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2(3), 502–515. https://doi.org/10.1109/JETCAS.2012.2221832

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free