In this paper, we empirically quantify inherent limitations of merchant switching silicon, which constrain SDNs' innovation potential. To overcome these limitations, we propose a Split SDN Data Plane (SSDP) architecture – anew switch architecture which allows rapid network innovation by complementing a cost-effective, yet inflexible, front end merchant silicon switch chip with a deeply programmable co-processor subsystem. We implemented SSDP on a prototype Dell Power Connect platform with a programmable multi-core data plane subsystem. To demonstrate SSDP's potential, we developed diverse real-world cases on the prototype platform. Benchmarking results show that, while delivering on its rapid innovation promise (with significantly shorter turn-around time), a SSDP architecture also provides reasonably high switching rates on deep flow tables.
Mendeley saves you time finding and organizing research
Choose a citation style from the tabs below