In this paper we investigate the possibility to reach 300mm CMOS requirements by integrating graphoepitaxy of PS-b-PMMA self assembly. First, the interface between the copolymer thin film and the resist/silicon substrate has to be neutralized in order to avoid a preferential wetting of the substrate by one block and to allow by this way the perpendicular orientation of the structure. This can be done by the chemical derivatization of the silicon wafers with random copolymers containing the same constituents as the block copolymer used3. Then, the PS-b-PMMA is spin coated and annealed in order to generate self assembly, then chemical treatment (dry or wet etching) removes the PMMA block and forms a PS mask. Different schemes to integrate DSA process by using 193nm dry lithography or e-Beam lithography will be presented. Moreover, several challenges like solvent compatibility, bake kinetics and defectivity will be addressed. Concerning defectivity, we will propose a methodology in order to evaluate and optimize the long range order induced by graphoepitaxy of the block copolymer DSA. This approach affords the monitoring of the overall block copolymer self-assembly process and enables us to easily optimize the parameters required for a long-range order structuration, leading to zero-defects block copolymers self-assembled networks. Transfer capabilities of the PS nanostructures in the bulk silicon substrate by using plasma-etching will be also detailed, both with the film on bare silicon or organized with graphoepitaxy approaches. These results show the high potential of DSA to be integrated directly into the conventional CMOS lithography process in order to achieve high resolution and pattern density multiplication, at a low cost.
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