Reduced complementary dynamic and differential logic: A CMOS logic style for DPA-resistant secure IC design

  • Rammohan S
  • Sundaresan V
  • Vemuri R
  • 4


    Mendeley users who have this article in their library.
  • 8


    Citations of this article.

Get free article suggestions today

Mendeley saves you time finding and organizing research

Sign up here
Already have an account ?Sign in

Find this document


  • Srividhya Rammohan

  • Vijay Sundaresan

  • Ranga Vemuri

Cite this document

Choose a citation style from the tabs below

Save time finding and organizing research with Mendeley

Sign up for free