2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), vol. 5, issue 6 (2002) pp. 1041-1050
In the frequency compensation scheme of low drop out (LDO) voltage regulators, a zero generated by the series combination of load capacitor and its electro static resistance (ESR) plays an important role. This frequency compensation tends to be inefficient, as one has to take into consideration a range of specified values for load capacitor and RESR, along with their variation with process and temperature. This paper presents a robust frequency compensation scheme that generates a zero internally without relying on RESR of load capacitor. The proposed frequency compensation has better RF noise rejection, low power consumption and improved transient response. The LDO regulator is designed in 0.35μm TSMC technology.
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