Thermal performance and microstructure of lead versus lead-free solder die attach interface in power device packages

Abstract

Lead- free solders are being investigated as replacements for lead solders currently used in the power electronics industry. Currently, the eutectic lead-tin alloy is widely used for attaching power devices. Thermal performance of packaged power devices and multichip modules depends largely on the quality of the solder interface between the power semiconductor devices, such as MOSFETs, IGBTs and diodes, and the substrate-heat sink assembly. The presence of voids at this interface after solder reflow, along with its mechanical degradation due to thermal cycling of a power package - consisting of materials with mismatched coefficients of thermal expansion - have been the leading causes of reduction in thermal performance and reliability of power packages. These issues along with recent environmental regulations have forced the industry to search for lead-free alternatives. Most of the existing efforts in lead-free solders have focused on flip-chip and wave solder applications, driven by the SMT manufacturers. This project examines the effects of temperature cycling on thermal performance of power devices attached using lead-free solders. After reflowing the lead-free solder, a baseline test of the electrical and thermal performances of the devices was conducted, and the quality of the die-attach solder interface is evaluated by scanning acoustic microscopy and metallographic analysis. Accelerated-life testing, thermal and power cycling is then performed. Acoustic images of the solder layer are periodically taken to characterize the effects of the solder interface fatigue. Cross-sectional samples are also prepared to monitor the evolution of the solder layer microstructure in an effort to draw a relationship between performance and microstructure.