Tunable charge-trap memory based on few-layer MoS2

  • Zhang E
  • Wang W
  • Zhang C
 et al. 
  • 74

    Readers

    Mendeley users who have this article in their library.
  • 54

    Citations

    Citations of this article.

Abstract

Charge-trap memory with high-κ dielectric materials is considered to be a promising candidate for next-generation memory devices. Ultrathin layered two- dimensional (2D) materials like graphene and MoS2 have been receiving much attention because of their fantastic physical properties and potential applications in electronic devices. Here, we report on a dual-gate charge-trap memory device composed of a few-layer MoS2 channel and a three- dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. Because of the extraordinary trapping ability of both electrons and holes in HfO2, the MoS2 memory device exhibits an unprecedented memory window exceeding 20 V. Importantly, with a back gate the window size can be effectively tuned from 15.6 to 21 V; the program/erase current ratio can reach up to 104, allowing for multibit information storage. Moreover, the device shows a high endurance of hundreds of cycles and a stable retention of ∼28% charge loss after 10 years, which is drastically lower than ever reported MoS2 flash memory. The combination of 2D materials with traditional high-κ charge-trap gate stacks opens up an exciting field of nonvolatile memory devices

Author-supplied keywords

  • MoS2
  • charge-trap memory
  • dual gate
  • memory characteristics
  • memory window

Get free article suggestions today

Mendeley saves you time finding and organizing research

Sign up here
Already have an account ?Sign in

Find this document

Authors

  • Enze Zhang

  • Weiyi Wang

  • Cheng Zhang

  • Yibo Jin

  • Guodong Zhu

  • Qingqing Sun

Cite this document

Choose a citation style from the tabs below

Save time finding and organizing research with Mendeley

Sign up for free