A 10Gb/s fully differential CMOS transimpedance preamplifier

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Abstract

A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 μm standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a power gain S21 of 22 dB with the bandwidth of 6GHz, and can operate at 10 Gb/s with dynamic range from 2.5μA up to 2.5 mA. The power consumption is only 88 mW. © 2003 IEEE.

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Tao, R., & Berroth, M. (2003). A 10Gb/s fully differential CMOS transimpedance preamplifier. In European Solid-State Circuits Conference (pp. 549–552). https://doi.org/10.1109/ESSCIRC.2003.1257194

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