Efficient reconfigurable logic circuits for matching complex network intrusion detection patterns

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Abstract

This paper presents techniques for designing pattern matching circuits for complex regular expressions, such as those found in network intrusion detection patterns. We have developed a pattern-matching co-processor that supports all the pattern matching functions of the Snort rule language [3]. In order to achieve maximum pattern capacity and throughput, the design focuses on minimizing circuit area while maintaining high clock speed. Using our approach, we are able to store the entire current Snort rule database consisting of over 1,500 rules and 17,000 characters into a single one-million-gate FPGA while comparing all patterns against traffic at gigabit rates. © Springer-Verlag Berlin Heidelberg 2003.

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APA

Clark, C. R., & Schimmel, D. E. (2003). Efficient reconfigurable logic circuits for matching complex network intrusion detection patterns. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2778, 956–959. https://doi.org/10.1007/978-3-540-45234-8_94

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