Hardware Implementation of a TEA-Based Lightweight Encryption for RFID Security

Abstract

This chapter discusses hardware implementation strategies for employ- ing the relatively lightweight Tiny Encryption Algorithm (TEA) in low-cost se- cure RFID systems. Low-cost RFID tags have stringent requirements, particularly in terms of cost related to silicon area, making conventional encryption unsuitable. Three different architectures implementing the TEA are evaluated and benchmarked with reference to designs that are area-optimized AES cores. It is found that using a customized digit-serial architecture, the TEA core has met the low-cost area re- quirementwhile consuming significantly less power than the AES equivalences. The core has an equivalent gate number of 3,872. Based on 0.35-µmCMOS technology, the complete layout has an area of 0.211mm2, suggesting a highly compact core solution.