Performance modeling of sparse matrix methods for distributed memory architectures

Abstract

We present analytical performance models for the numerical factorization phase of the multifrontal method for sparse matrices. Using a concise characterization of parallel architectures, we provide upper-bound estimates for the speedups observed on actual test problems taken from scientific and engineering applications. Representative architectures include an iPSC/2, iPSC/860, various clusters of workstations, and supercomputers connected by HIPPI interfaces. Simulation results suggest that the effective parallelism of these problems is quite sensitive to the communication bandwidth of the underlying architecture and load imbalances in the computational graph due to irregular data patterns.