Comprehensive Design of Device Parameters for GaN Vertical Trench MOSFETs

Abstract

In this work, device parameters for GaN vertical trench MOSFETs have been investigated systematically to further improve the device characteristics. The n- GaN drift layer, the p+ GaN layer and the trench gate are designed and optimized systematically using Silvaco ATLAS 2-D simulation, in order to get the best trade-off between VBR and specific on-resistance Ron. Three-terminal breakdown curves, the electron concentration, current density and electric field strength distributions have been presented to analyze the breakdown characteristics. The correlations between different parameters and different initial conditions are considered, and the eight parameters are optimized comprehensively. After the final optimization, record high FOM of 4.8 GW/cm2, VBR of 2783 V, average electric field Edrift of 1.98 MV/cm and a low Ron of 1.6 mΩ cm2 are obtained for drift layer thickness of 14μm. The product of the thickness Lp and doping density Np of p+ GaN layer can determine the breakdown mechanism, and punch through mechanism would occur when Lp Np is lower than a certain value. The results indicate there exists large optimization room for fabricated GaN vertical trench MOSFETs, and the device characteristics can be further improved through the methodology in this paper for high power and high voltage applications.