Balancing Automation and Control for Formal Verification of Microprocessors

Citations of this article
Mendeley users who have this article in their library.

This article is free to access.


Formal methods are becoming an indispensable part of the design process in software and hardware industry. It takes robust tools and proofs to make formal validation of large scale projects reliable. In this paper, we will describe the current status of formal verification at Centaur Technology. We will explain our challenges and our methodology—how various proofs and verification artifacts are interconnected and how we keep them consistent over the duration of a project. We also describe our main engine—a powerful symbolic simulator with rewriting capabilities that is integrated in a theorem prover and proven correct.




Goel, S., Slobodova, A., Sumners, R., & Swords, S. (2021). Balancing Automation and Control for Formal Verification of Microprocessors. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 12759 LNCS, pp. 26–45). Springer Science and Business Media Deutschland GmbH.

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free