Structural fault modelling in nano devices

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Abstract

In this paper we present a model for structural failures in nano-devices. Fault being considered include stuck-at and bridge faults only. This model is an extension of probabilistic model based on Gibbs energy distribution and belief propagation as presented in NANOLAB [1]. Results have been carried out on a 8-bit full adder circuit. Simulation results indicate that probabilistic TMR model represents bridge and stuck-at-1 faults better while deterministic model is more suited for stuck-at-0 faults. © ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering 2009.

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Gaur, M. S., Narasimhan, R., Laxmi, V., & Kumar, U. (2009). Structural fault modelling in nano devices. In Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering (Vol. 3 LNICST, pp. 6–10). https://doi.org/10.1007/978-3-642-02427-6_2

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