Multi-bit error control coding with limited correction for high-performance and energy-efficient network on chip

2Citations
Citations of this article
6Readers
Mendeley users who have this article in their library.

Abstract

In the presence of deep submicron noise, providing reliable and energy-efficient network on-chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)-based coding scheme that simultaneously reduces the crosstalk induced bus delay and provides multi-bit error protection while achieving high-energy savings. This is achieved by calculating two-dimensional parities and duplicating all the bits, which provide single error correction and six errors detection. The error correction reduces the performance degradation caused by retransmissions, which when combined with voltage swing reduction, due to its high error detection, high-energy savings are achieved. The results show that the proposed scheme reduces the energy consumption up to 51.7% as compared with other schemes while achieving the target link reliability level. Also, it shows improved network performance as compared with ARQ-based scheme and close to forward error correction-based schemes.

Cite

CITATION STYLE

APA

Flayyih, W. N., Samsudin, K., Hashim, S. J., Ismail, Y., & Rokhani, F. Z. (2020). Multi-bit error control coding with limited correction for high-performance and energy-efficient network on chip. IET Circuits, Devices and Systems, 14(1), 7–16. https://doi.org/10.1049/iet-cds.2018.5282

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free