Hardware support for efficient resource utilization in manycore processor systems

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Abstract

Effective utilization of the available processing resources in current multi- and manycore systems primarily depends on the manual talent of the application programmer. This chapter analyses opportunities and suggests approaches to tackle the challenge of making proper use of parallel resources by means of a holistic, cross-layer and inter-disciplinary optimization of application, middleware and architecture aspects. Using heterogeneous network processors as an example, we show how application specific architecture optimizations in this processor domain can be adapted to benefit designs of homogeneous general purpose manycore systems. In addition, methods which have been applied successfully to HPC and scientific computing over the past decades are assessed and down-scaled to benefit manycores. Finally we show how bio-inspired principles (i.e., self-organization and self-adaptation) provide rich opportunities for meaningful adoption in both application-specific and general purpose manycores, for example to provide self-optimization of processor parameters and workload utilization. In summary, we present a set of suggestions for architectural improvements and building blocks that, from our perspective, are useful for future manycores in order to better support the exploitation of available parallel processing resources. © 2011 Springer Science+Business Media, LLC.

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APA

Herkersdorf, A., Lankes, A., Meitinger, M., Ohlendorf, R., Wallentowitz, S., Wild, T., & Zeppenfeld, J. (2011). Hardware support for efficient resource utilization in manycore processor systems. In Multiprocessor System-on-Chip: Hardware Design and Tool Integration (pp. 57–87). Springer New York. https://doi.org/10.1007/978-1-4419-6460-1_3

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