In this chapter the possibilities for reducing the computational load of look-ahead digital-to-digital conversion are explored. An analysis is made of the opportunities to reduce the number of computations required to perform full look-ahead. For small look-ahead depth it is possible to reduce the number of calculations, but for large look-ahead depths the savings that can be realized are limited, and ultimately the number of computations that are required per output symbol doubles with an increase of the look-ahead depth by one. As an alternative to full look-ahead, the possibilities for performing pruned look-ahead are explored. In this case not the full solution space is explored, but based on heuristics a small subset of all the solutions are investigated. This approach can realize a large reduction of the computational load, while the impact on the signal conversion performance can be made negligible small. Because of the potentially large advantage over full look-ahead, several ideas for realizing pruned look-ahead modulators are presented, that are explored in detail in the next chapters.
CITATION STYLE
Janssen, E., & van Roermund, A. (2011). Reducing the Computational Complexity of Look-Ahead DD Conversion. In Analog Circuits and Signal Processing (pp. 77–101). Springer. https://doi.org/10.1007/978-94-007-1387-1_6
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