An analog VLSI implementation for Cepstral technique for disparity estimation in stereoscopic vision

Abstract

The stereoscopic vision algorithms for binocular vision are very popular and widely applied. Some of the algorithms are biologically inspired. Like, Cepstral filtering technique is applied on an interlaced image, the pattern similar to that which is found in layer IV of primate visual cortex. It involves Power spectrum in computation, which is square of absolute of Fast Fourier Transform (FFT), is a complicated and hardware unfriendly. We propose a new algorithm, in which Gabor filters, instead of Power Spectrum, are applied to the interlaced image in the Cepstral algorithm. This new algorithm makes it hardware friendly as it gives us the flexibility of working with modules which can be imitated in hardware. Such as building a FFT module is a tough ask in analog circuit but determining gabor energy, an alternative to it, is achieved by elementary circuits. A hardware scheme has also been proposed that can be used to estimate disparity and the idea can be extended in building complex modules that can perform real time - real image operations with a handful of resources as compared to employing complex digital FPGAs and CPLDs. © 2011 Springer-Verlag.