Computational intelligence and neuromorphic computing architectures

Abstract

In the computational intelligence field of study neuromorphic computing is close to reaching critical mass to enable low power compact hardware systems to perform intelligent cognitive functions. The fundamental technical challenge that has prevented this technology from becoming reality is the development of a synthetic synapse. In the biological brain, the synapse regulates the connection (conductivity) strength between neurons allowing the brain to re-wire itself as it processes and obtains new knowledge and stores memories. In terms of device engineering, the synapse correlates to a passive variable impedance electronic device. Today, the synapse equivalent, a novel device theorized in 1971 by Professor Leon Chua, is a reality as reported by the Nature paper titled “The memristor device found” in 2008. Also, various material systems have demonstrated synaptic memristor behavior such as the AgSEnSe memristor developed at Boise State University (BSU). However, as we move forward to fabricating memristor arrays to implement complex cognitive neuromorphic functions, it will become critical to understand and model the physical principles underlying device process variation and device array statistical phenomena. It is the goal of this chapter to explore emerging technologies to enable the development of large scale memristor-based neuromorphic computing architectures.