In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic which is a modification of Fiduccia-Matheses algorithm. Using well-known benchmarks (including ACM/SIGDA benchmarks), the combination of genetic algorithm and the local heuristic outperformed hMetis [3], a representative circuit partitioning algorithm. © Springer-Verlag Berlin Heidelberg 2003.
CITATION STYLE
Kim, J. P., & Moon, B. R. (2003). Circuit bipartitioning using genetic algorithm. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2724, 2408–2409. https://doi.org/10.1007/3-540-45110-2_137
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