Realization of all logic gates and memory latch in the SC-CNN cell of the simple nonlinear MLC circuit

Abstract

We investigate the State-Controlled Cellular Neural Network framework of Murali-Lakshmanan-Chua circuit system subjected to two logical signals. By exploiting the attractors generated by this circuit in different regions of phase space, we show that the nonlinear circuit is capable of producing all the logic gates, namely, or, and, nor, nand, Ex-or, and Ex-nor gates, available in digital systems. Further, the circuit system emulates three-input gates and Set-Reset flip-flop logic as well. Moreover, all these logical elements and flip-flop are found to be tolerant to noise. These phenomena are also experimentally demonstrated. Thus, our investigation to realize all logic gates and memory latch in a nonlinear circuit system paves the way to replace or complement the existing technology with a limited number of hardware.