Scalable cache coherence for large shared memory multiprocessors

Abstract

This paper describes a new hardware solution for the cache coherence problem in large scale shared memory multiprocessors. The protocol is based on a linked list of caches - forming a distributed directory and (to ensure a scalable design) does not require a global broadcast mechanism. Fully-mapped directory-based solutions proposed earlier also do not require a global broadcast mechanism. However, our solution has a lower cost and potentially better performance than the fully-mapped directory-based protocol. We provide simulation results to show that the performance of the distributed directory protocol is more robust when there is contention for the data and for variations in memory technology. Further, we do not assume that the network preserves the order of messages. Thus we do not preclude adaptive routing. Our solution also allows an efficient implementation of locks.