An on-chip all-digital PV-monitoring architecture for digital IPs

Abstract

This paper presents an on-chip all-digital sensor architecture to capture process variation information. The proposed solution is based on the concept of variation amplification and uses the propagation delay measurement in a chain composed of series connected pass-transistors. The proposed sensor circuit is able to capture the local variation of nMOS and pMOS transistor individually. A sensor block is proposed, which contains N-type and P-type sensor circuit along with scan, control, and measurement circuitry. An array of sensor blocks with scan chain connection gathers process variation information all across the die. Detailed SPICE level simulations conducted for an industrial 45nm CMOS technology indicates its feasibility in sensing, and on-chip all-digital measurement of process variation effect. © 2011 Springer-Verlag.