Modeling of syllogisms in analog hardware

Abstract

Syllogistic reasoning is modeled in analog hardware and some hardware models, i.e. syllogisms Baroco and Darii are presented. Chaining of syllogisms is modeled by using original min-max entities (circuits), "to see" whether the two rules, modeled in dedicated hardware, i.e., IF A THEN B and IF B THEN C imply the "hardware" rule IF A THEN C. The preliminaries include original min-max circuits based on operational amplifiers (Op-Amp), straight lines Op-Amp generators and different test circuits designed in Electronics WorkBench simulation environment and in real hardware. The "stage" to perform modeling is the phase plane. © 2012 IFIP International Federation for Information Processing.