An enhanced main memory index structure employing the level prefetching technique

Abstract

In main-memory resident index structures, secondary cache misses have a considerable effect on the performance of index structures. Recently, several main-memory resident index structures that consider cache have been proposed to reduce the impact of secondary cache misses. However, they still suffer from full secondary cache misses whenever visiting each level of index trees. In this paper, we propose a new index structure that minimizes the total amount of cache miss latency. The proposed index structure prefetches the grandchildren of a current node. The basic structure of the proposed index structure is from CSB+-Tree that uses the concept of the node group to increase fan-out However the insert algorithm of the proposed index structure reduces the cost of a split significantly. Also, we show the superiority of our algorithm through performance evaluation. © Springer-Verlag Berlin Heidelberg 2003.