FPGA framework for agent systems using dynamic partial reconfiguration

Abstract

Dynamic Partial Reconfiguration of FPGAs enables tasks typically executed in software, such as threads and agents, to be executed directly in hardware. Typically, these systems use a CPU to manage the hardware and software tasks, but they do not take full advantage of the concurrency capable from an FPGA. This paper presents a hardware framework that leverages the concept of agents for FPGA-based designs. This enables not only the hardware modules to be viewed as agents, but also provides a means to selectively design and componentize the communications network for the hardware agents. The proposed framework enables hardware agents to be implemented to run concurrently and allows them to communicate with each other without requiring a CPU. © 2011 Springer-Verlag.