Implementation and evaluation of openMP for Hitachi SR8000

Abstract

This paper describes the implementation and evaluation of the OpenMP compiler designed for the Hitachi SR8000 Super Techni-cal Server. The compiler performs parallelization for the shared mem-ory multiprocessors within a node of SR8000 using the synchronization mechanism of the hardware to perform high-speed parallel execution. To create an optimized code, the compiler can perform optimizations across inside and outside of a PARALLEL region or can produce a code opti-mized for a fixed number of processors according to the compile option. For user's convenience, it supports combination of OpenMP and auto-matic parallelization or Hitachi proprietary directive and also supports reporting diagnostic messages which help user's parallelization. We evaluate our compiler by parallelizing NPB2. 3-serial benchmark with OpenMP. The result shows 5. 3 to 8. 0 times speedup on 8 processors.