Propagation Delay Variation due to Process Induced Threshold Voltage Variation

Abstract

Process variation has emerged as a major concern in the design of circuits including interconnect pipelines in current nanometer regime. Process variation results in uncertainties of circuit performances such as propagation delay, noise and power consumption. Threshold voltage of a MOSFET varies due to changes in oxide thickness; substrate, polysilicon and implant impurity level; and surface charge. This paper provides a comprehensive analysis of the effect of threshold variation on the propagation delay through driver-interconnect-load (DIL) system. The impact of process induced threshold variations on circuit delay is discussed for three different technologies i.e 130nm, 70nm and 45nm. The comparison of results between these three technologies shows that as device size shrinks, the process variation issues becomes dominant during design cycle and subsequently increases the uncertainty of the delays. © Springer-Verlag Berlin Heidelberg 2010.