A novel hardware/software partitioning technique for system-on-chip in dynamic partial reconfiguration using genetic algorithm

Abstract

Hardware/software partitioning is a common method used to reduce the design complexity of a reconfigurable system. Also, it is a major critical issue in hardware/ software co-design flow and high influence on the system performance. This paper presents a novel method to solve the hardware/software partitioning problems in dynamic partial reconfiguration of system-on-chip (SoC) and observes the common traits of the superior contributions using genetic algorithm (GA). This method is stochastic in nature and has been successfully applied to solve many non-trivial polynomial hard problems. It is based on the appropriate formulation of a general system model, being therefore independent of either the particular co-design problem or the specific partitioning procedure. These algorithms can perform decomposition and scheduling of the target application among available computational resources at runtime. The former have been entirely proposed by the authors in previous works, while the later have been properly extended to deal with systemlevel issues. The performance of all approaches is compared using benchmark data provided by MCNC standard cell placement benchmark netlists. This paper has shown the solution methodology in the basis of quality and convergence rate. Consequently, it is extremely important to choose the most suitable technique for the particular co-design problem that is being confronted.