Efficient VLSI Implementation of CORDIC-Based Direct Digital Synthesizer

Abstract

This paper presents efficient VLSI implementation of a direct digital synthesizer (DDS). Coordinate rotation digital computer (CORDIC) architecture is used in realizing the phase-to-amplitude converter (PAC) block in the proposed design. The proposed synthesizer has a frequency control word (FCW) that can select up to three different values for the phase increment. The proposed design is realized in Xilinx Virtex II Pro FPGA development board and is tested for its functionality using ChipScope Pro. The proposed design is mapped on to several families of Xilinx FPGAs for comparing the performance. Proposed synthesizer is also implemented using ASIC design flow. In the reported design, quadrature outputs can be obtained simultaneously. © Springer India 2015.