High-Performance P-Channel Tin Halide Perovskite Thin Film Transistor Utilizing a 2D–3D Core–Shell Structure

Abstract

Metal halide perovskites (MHPs) are plausible candidates for practical p-type semiconductors. However, in thin film transistor (TFT) applications, both 2D PEA2SnI4 and 3D FASnI3 MHPs have different drawbacks. In 2D MHP, the TFT mobility is seriously reduced by grain-boundary issues, whereas 3D MHP has an uncontrollably high hole density, which results in quite a large threshold voltage (Vth). To overcome these problems, a new concept based on a 2D–3D core–shell structure is herein proposed. In the proposed structure, a 3D MHP core is fully isolated by a 2D MHP, providing two desirable effects as follows. (i) Vth can be independently controlled by the 2D component, and (ii) the grain-boundary resistance is significantly improved by the 2D/3D interface. Moreover, SnF2 additives are used, and they facilitate the formation of the 2D/3D core–shell structure. Consequently, a high-performance p-type Sn-based MHP TFT with a field-effect mobility of ≈25 cm2 V−1 s−1 is obtained. The voltage gain of a complementary metal oxide semiconductor (CMOS) inverter comprising an n-channel InGaZnOx TFT and a p-channel Sn-MHP TFT is ≈200 V/V at VDD = 20 V. Overall, the proposed 2D/3D core–shell structure is expected to provide a new route for obtaining high-performance MHP TFTs.