Reduction in Total Harmonic Distortion in Induction Motor Drives with High-Performance FPGA Controller

Abstract

This paper proposes the design and development of a space vector pulse width modulated v/f controller in FPGA for a three-phase multilevel inverter. The complexity of the modulation scheme and the switching signal generation for motor drives rises with the increase in the number of levels of the inverter. Due to the sequential processing of instructions, microprocessors and digital signal processors are unable to execute short duration pulse width modulated switching signals in real-time, resulting in harmonic distortion. The proposed algorithm is implemented in FPGA to get a dynamic response and to improve the harmonic performance. All of the controller's modules are embedded in a single FPGA and operate in synchronism with a single clock. The controller is validated with a 4-Level inverter, which drives an open-end winding induction motor. Because of algorithm optimization, single clock synchronization, and FPGA parallel processing, the controller has less than 1% total harmonic distortion. There is no need for bulky and costly harmonic reduction filters with this design technique. The proposed scheme shows much better harmonic performance compared to other higherlevel schemes