A fully integrated low-IF GPS receiver with minimum external components is implemented in a 65nm CMOS process. It has an integrated LNA and an active complex bandpass filter with a switchable signal bandwidth of 2MHz or 6 MHz to achieve the SNR improvement. To reduce power consumption, the current reusing method and current mode interface technique using a capacitive cross-coupled common-gate structure are applied. The measured noise figure of whole receiver including an external inter-stage SAW filter is 2.2dB. Its current consumption is 15mA at 1.8V supply. © 2010 IEEE.
CITATION STYLE
Moon, H., Heo, S. C., Yu, H., Yu, J., Chang, J. S., Choi, S. I., … Park, B. H. (2010). A 27mW 2.2dB NF GPS receiver using a capacitive cross-coupled structure in 65nm CMOS. In Proceedings of the Custom Integrated Circuits Conference. https://doi.org/10.1109/CICC.2010.5617450
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