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Book Chapter

Testing and Validation of Synchrophasor Devices and Applications

  • Banerjee P
  • Pandey S
  • Srivastava A
  • et al.
DOI: 10.1007/978-3-319-89378-5_3
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Abstract

… The joint task force by NIST and PNNL is recently created for quantifying errors caused by the network and phasor estimation algorithms and its impact on different WAMS applications … 3.4.3 Preprocessing PMU Data for Event Detection …

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Banerjee, P., Pandey, S., Srivastava, A. K., & Lee, D. (2019). Testing and Validation of Synchrophasor Devices and Applications (pp. 41–75). https://doi.org/10.1007/978-3-319-89378-5_3

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