We propose a design of a compact photonic sensor based on two cascaded rings in a Vernier configuration integrated with a low-resolution flat-top planar echelle grating (PEG) de-multiplexer. The Vernier rings are composed of a filter and sensor rings. The sensor maps discrete changes in the index contrast, due to the presence of a target analyte, to a set of de-multiplexer channels. The channel number with highest transmittance is directly proportional to the incremental change of the effective index. Optical characteristics at different free spectral ranges (FSRs) ranging from 1 nm to 10 nm, have been studied. For example, if a filter ring FSR of 5 nm is selected, the corresponding sensor ring and de-multiplexer FSR are 4.7 and 5 nm, respectively, whereas the limit of detection (LOD) is.
CITATION STYLE
Rasras, M. S., & Al Mrayat, O. (2018). Lab-on-chip silicon photonic sensor. In The IoT Physical Layer: Design and Implementation (pp. 83–102). Springer International Publishing. https://doi.org/10.1007/978-3-319-93100-5_6
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