Abstract
In the VAMP (verified architecture microprocessor) project we have designed, functionally verified, and synthesized a processor with full DLX instruction set, delayed branch, Tomasulo scheduler, maskable nested precise interrupts, pipelined fully IEEE compatible dual precision floating point unit with variable latency, and separate instruction and data caches. The verification has been carried out in the theorem proving system PVS. The processor has been implemented on a Xilinx FPGA. © Springer-Verlag Berlin Heidelberg 2003.
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CITATION STYLE
Beyer, S., Jacobi, C., Kröning, D., Leinenbach, D., & Paul, W. J. (2003). Instantiating uninterpreted functional units and memory system: Functional verification of the VAMP. Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2860, 51–65. https://doi.org/10.1007/978-3-540-39724-3_7
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