Design and implementation of PowerMill

Abstract

In this paper we discuss the design and implementation of the simulator PowerMill, a novel transistor level simulator for the simulation of current and power behavior in VLSI circuits. With a new transistor modeling technology and a versatile event driven simulation algorithm, PowerMill is capable of simulating detailed current behavior in modern deep-submicron CMOS circuits, including sophisticated circuitries such as exclusive-or gates and sense-amplifiers, with speed and capacity approaching conventional gate level simulators. The high accuracy and speed have made it possible for designers to study and verify detailed current behavior of large functional blocks or even an entire chip with a reasonable amount of CPU resources, making it a de facto industry standard for power simulation.